
Astria® Tile
Embedded system tile intended to let developers integrate a Spartan-7 into a design without a chip-down implementation..
Technical specifications availableSPACE TILE ARCHITECTURE
01MODULAR HARDWARE
Astria and Galaxia provide FPGA options. Additional processing and memory tiles remain in development.

Embedded system tile intended to let developers integrate a Spartan-7 into a design without a chip-down implementation..
Technical specifications availableTile built around the same FPGA as the Galaxia development board so it can be designed into missions or advanced prototyping/test solutions..
Technical specifications availableEdge-AI-optimized FPGA module combining a Lattice FPGA with integrated BrainChip Akida® neuromorphic IP accelerator..
In development · Discuss requirementsHigh-performance Microchip PolarFire® FPGA-based module for demanding space computing and signal-processing tasks..
In development · Discuss requirementsHigh-capacity radiation-tolerant mass-memory tile for reliable high-throughput data storage in harsh environments..
In development · Discuss requirements02DEVELOPMENT RESOURCES
Reference designs and documentation from the original Adiuvo product sources. Follow the source for current availability.
A 59 mm by 59 mm Spartan 7 tile for integrating FPGA capability without designing a chip-down solution.
Product resourcesA Galaxia tile using the same FPGA as the development board for mission design-in, advanced prototyping, and testing.
Product resourcesSource: Adiuvo Engineering. Specifications should be confirmed for the chosen mission configuration.
NEXT MISSION. NEW POSSIBILITIES.
Bring us your mission constraints.
Let’s engineer the compute around them.