Space tile / module
Astria® Tile
Embedded system tile intended to let developers integrate a Spartan-7 into a design without a chip-down implementation.
Technical specifications available
Specifications describe the product architecture. Availability, radiation configuration, performance and qualification evidence are confirmed during mission review. DANU product flight heritage is not claimed.
Tile specifications
| Supply voltage | 4.5 to 18 V |
|---|---|
| FPGA | Spartan 7 XC7S25 with 23,360 logic cells, 80 DSP, 45 BRAM |
| Configuration Memory | 256 Mbit QSPI |
| Indicator | Done LED |
| Indicator | Two user LEDs |
| Debug | USB JTAG |
| Oscillator | 100 MHz |
| Control | Reset button |
| Boot selection | JTAG / QSPI |
| PSRAM | 32 Mbit |
| I/O | 82 I/O including power and ground, JTAG, 32 I/O at 3v3, 41 I/O configurable voltage (3v3-1.2V and LVDS) |
Starter collateral
| Included collateral | User guide |
|---|---|
| Included collateral | Schematic |
| Included collateral | Vivado board definition |
| Included collateral | Reference designs including IP to enable processor access to FPGA internals using UART / SPI |
| Included collateral | Tile footprint in Altium to help accelerate design |
Support
| Support note | Information is presented on Adiuvo Engineering’s public repository; Setanta Space can be contracted to develop the application or assist with it. |
|---|
Typical application
- System Controller — Power supply sequencing, power monitoring, configuration management, board management, supervision, and communication interface.
- Protocol conversion — Convert to and from bespoke / legacy protocol.
- Sensor Aggregation — Aggregate several different sensor types for easy access by processor.
- I/O expansion — Provide additional interfaces such as QSPI, SPI, I2C, etc.
- Processing offloading — Control algorithms such as PID, filtering, co-processing, encryption and decryption of data streams entering and leaving the system.
- Health and Usage Monitoring systems — Integrate with sensors such as accelerometer, pressure, humidity, etc. to monitor environmental operating conditions.
- Rapid Prototyping — Quickly demonstrate an FPGA concept, reduce FPGA integration risk, and remove obsolescence-management issues.
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